Application Form (.DOC) Application Form (.ODT) Application Form (.PDF)
Objectives
Moore’s Law has made profound impacts on every segment of technology. Advancements in VLSI technology has resulted in integrating complex circuits, thereby making huge performance improvements. It is important to acquire knowledge on the various facets of VLSI technology, design and test. The course aims to familiarize its participants on fundamental approaches and latest trends in VLSI design, test and also provide practical exposure by hands-on sessions on digital design using FPGAs and circuit modeling.
Course Contents
Resource Persons
Faculty is drawn from IIT's, R&D organizations, industry and academia.
Eligibility
Admissions are open for faculty members from any engineering branches of AICTE approved engineering colleges. All participants have to be ISTE members or should have applied for membership at the time of course.
How to Apply
The course fee is Rs. 2000/-. Completed application form in the given format along with the DD for Rs 2000/- in favour of ISTE Chapter, Model Engineering College, Ernakulam, should reach the Coordinator on or before 11th July 2008. Selection of the participants will be intimated via E-Mail on or before 16th July 2008. No accommodation facility will be available. No TA/DA will be provided.
Application form can be downloaded from the following links:
Application Form (.DOC) Application Form (.ODT) Application Form (.PDF)